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Apologies if this is not the right place for this. I'm trying to help a friend out with a project, he's trying to build one of the copybit strippers that was published in Elektor about 20 years ago detailed here http://www.minidisc.org/copybit/copybit.html It's a clever design that uses a ROM based state machine built of jellybean parts however he has been unable to find the code for the ROM and my Google-fu has come up dry as well. It was at one point offered as a kit but it seems that company is long gone. Has anyone here actually built one of these? The ROM is a standard 27C512 so dumping the contents is trivial if I could locate a unit to read it from. If anyone does have one of these or better yet has already dumped the firmware from one that would be fantastic.

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I'm wayyy off topic here, but if you like my waffle... These days (since early 1990s) we do the logic design with specialised software languages like SystemVerilog or VHDL, generally known as Har

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Right place, but maybe a tough question. That does go way back. I've never seen a report of one that was actually built, but maybe someone here has.  I owned a Hucht ICP 1-CE Copyprocessor for a long time; now I rely on the MDS-E10 for SCMS killing. If Mr. Hanft is extant, perhaps you could try to contact him?

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With respect, we know so many simple ways to get around SCMS, this project is kinda moot.

1. Buy a pro model (for around $200?) such as the MDS-E10
2. Get a device like the Behringer Ultramatch Pro
3. Buy a $20 sound card for a PC - the majority of them don't care about SCMS and allow you to disable it, period.

The major problem people have with MD these days is the folks who unwisely used NetMD to make LP2 disks (excellent quality, 2-3 CD's per MD) but now have "lost" the original CD (or perhaps never had it except briefly) and want to get the data off the MD. There is almost nothing to fix this problem except playing back at x1. Granted, you will still need to get over the SCMS problem then. But there's no SCMS in the actual ATRAC file, I think.

In addition there are so many other pesky restrictions designed to protect Sony a. as a content producer b. against lawsuits like the one over the Betamax that almost finished them off 40 years ago, and we know all of them, that the SCMS is probably the least of them. 20 years ago it may have presented as the most significant stumbling block to copying music. Today, it ain't.

Good luck in your quest. Or stick around here to see the real life solution to what I can only guess is the the real life problem.

Cheers

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Oh he's aware of other ways to get around SCMS, I found at least one other open source project too. I haven't asked what he actually needs it for but knowing him I suspect it's more a case of the ROM based state machine being an interesting approach to the problem and something fun to play around with. I know he also does a fair bit of repair, refurbisment and other work for a recording studio that specializes in vintage gear so it may be related to that, I can ask if anybody actually cares. We're both engineers with an interest in retro tech as much for the technology itself as for any real need for what it does. While I have no need for it myself, indeed I don't think I even own anything that can record from SPDIF the design piqued my interest when I saw it because it reminds me of the vector generator state machine that Atari used in their vector graphics arcade games from the late 70s-early 80s, those being a long time hobby of mine. Anyway if something turns up great, if not, well as has been pointed out here there are other solutions. It just bugs me because I know there must be a handful of these things kicking around someplace, somebody somewhere must have built one. I've found ROMs for obscure computer equipment from the 1980s so I thought this would be easy.

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[ETA] Sorry James, I realise you already bagged the EPROM as part of an FSM. I wrote the below on my phone first thing having not read the entire thread above!

The EPROM does not contain machine code for a microprocessor. It’s used as a neat way to implement a finite state machine (standard digital electronics building block). It’s job is to match a sequence of bits in the SPDIF [***] preamble in order to identify the  SCMS control bits which the rest of the circuit then override and reconstruct the SPDIF stream.

Maybe there is some circuit description in the magazine article [*] that describes this and thus you could work out the EPROM contents. 
Do some investigation then come back here with some details and I can probably help you decipher what you need. 
 

Kevin

[*] I’ve got a feeling I have a scan of that article [**].

The EPROM implements the ‘next state’ logic and IC9 holds the ‘current state’.

All the crazy stuff at the top of the schematic is about clock recovery!

Just look at IC7,8,9. IC7 is a shift register clocking in the SPDIF data stream. The first job for our IC8,9 FSM is ‘frame alignment’ as bits arrive in IC7 and get presented to the EPROM.  ‘Bits’ (pins) 18 through 12 on IC9 are your ‘current state’.

 

[**] A had a Google too. It seems Elektor did at least 3 articles on SCMS circuits. I can't get to any of these, even after registering on the Elektor site, as you need a paid membership to access these articles. The article I do have a copy of is for a different SCMS copy-bit killer circuit, again from Elektor, but from June 2002. As with the circuit you refer to, it uses an EPROM as a nifty way to perform the next-state logic, but this logic is specific to their circuit design, so even if I had the ROM contents they wouldn't be correct for your particular Elektor project.

[***] There is some framing/protocol information on epanorama or HwB or scanlime. As I'm sure you've already worked out, the circuit aims to make bit 2 of the ChannelStatus a logic '1' (copy allowed).

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I did find the article detailing the construction, unfortunately it doesn't have any specific details about the code in the ROM, only a mention that it was created with the help of a Pascal program which does not appear to have been offered. From what I can see, the source file for the EPROM was never offered directly, the author's company would supply either a programmed ROM, a partial kit with the ROM and PCB, or a complete kit with everything, none of which is any help since the company is long gone and I would not be surprised if the author is dead by now.

 

Yes I'm sure we could work out the "code" to implement a ROM based state machine duplicating the function of the original design given sufficient effort although that could prove to be quite a lot of work and push the effort required to build this one beyond what is reasonably worth doing. I am intrigued by the design though, I have built finite state machines in FPGAs before and but other than in the Atari vector games I can't think of any other places I've encountered one in "real life".

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Hi James,

No problem - I'd understood that you wanted this as a learning/academic exercise - earlier in the thread we've already discussed the more practical solutions to the problem with ready-made products.

Regards the Pascal program, this is something you could code in C or Perl or Python or Tcl, or even Verilog/SystemVerilog or VHDL if that is what you used for your FPGA design work. All it's doing is taking the grind out of converting your FSM next-state logic design into a file to feed your EPROM programmer (Hex, Intel or S-Record file).

I'm not trying to suggest this is trivial by any means, but it is certainly a tractable and interesting/valuable exercise in FSM design with ROM. Most of the ROM will contain very boring numbers. For example, most of the time, the circuit should just copy the SPDIF input to the SPDIF output. It's only that Copy bit that we're trying to intercept and change to a '1'. What this means, is for most states, the EPROM D0 output (which is the SPDIF output) is the same value as input A0 (the "oldest" bit in the SPDIF input shift register).

What this means, is that for many addresses, A[15:1]=X, A[0]=0 the ROM location contains 0x00 (i.e D0=0) and for A[15:1]=X, A[1]=1 the ROM location contains 0x01 (i.e D0=1). That is your "background fill" for the ROM. However some of these addresses need overwriting with your FSM design and as previously discussed, this needs to watch the SPDIF input bits arrive at the shift register parallel output (on A[7:0]), look for the framing signal, then step through subsequent bits until the Copy bit is aligned with A[0] and then, instead of outputting "A[0]" on D0, it outputs a '1' (i.e. you will have a memory location with A[0]=0 that has D0=1 rather than the D0=0 we would have had from our "background fill").

Regards FSMs in real life. Any non trivial digital logic is jam-packed with FSMs. They are so fundamental they are ubiquitous. Even a simple digital counter is an FSM. It has states 0,1,2,3,4,...,(n-1),0,... So your clock radio, microwave oven, TV, MD/CD/DVD/video machines, phone, computer, car, DAB radio, calculator, digital watch, FitBit, Xmas tree lights etc etc etc!!!

Good luck and enjoy!

Kevin

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Thanks I'll pass that on and see what happens, as an academic exercise it's worth spending some effort on but it's not worth expending a tremendous effort, your explanation combined with what I already know does make things significantly clearer.

Oh yes I realize that FSMs are everywhere, but most of the time these days anything more trivial than a counter or flip flop is typically just done in software with a microcontroller. This particular type of FSM using a ROM that addresses itself through a latch has not come up often but perhaps it was more common back in the 80s. It's also entirely possible that it is a common building block used in ASICs.

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9 minutes ago, James_S said:

Oh yes I realize that FSMs are everywhere, but most of the time these days anything more trivial than a counter or flip flop is typically just done in software with a microcontroller.

Nope, sorry. I'm a (digital) IC designer by day (and night more often than I'd like!). Hardware FSMs are our bread and butter! We love our software boys dearly, but there is a damn lot of complex hardware behind that software (if there is any software involved at all) and the bulk of it is based around implicit or explicit FSMs! There are ~6 billion transistors in the last chip I worked on and a similar number in the current one [that I'm supposed to be working on now, not typing this!]. OK there is a lot of memory in that, but there are also many millions of flip-flops that are part of FSMs, counters, FIFOs and other control type structures.

From a conversation with a non-techie I had a few years ago (maybe at a wedding or something like that): "Oh, you're a silicon chip designer? I thought we dug them up." - yep, they come straight out of the silicon chip mine and they know from birth they're a mobile phone modem/microwave oven controller/TV display controller/toothbrush driver... <add an almost unimaginable number of other electrical devices>

Thinking more widely about the various jobs that people have across the world to create products, provide services and the like, I can imaging the "man on the street" would be totally amazed at the type of jobs there are out there that they wouldn't envisage in daily life, but enable that life. It's easy to comprehend a builder or a shop worker or an accountant, but there are so many "behind the scenes" jobs that enable modern life that most of the general public are just oblivious to!

Anyway I digress... Hope you give it a bash even if you don't manage to work out the entire FSM!!! :-D

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That's actually fascinating, it makes me realize that I've often viewed more complex and specialized ICs as a black box that does stuff without really thinking about what goes on inside it. I suppose it's the case that these FSMs are integrated into ASICs so they're there, but the end user designing them into something or working on existing equipment doesn't have any visibility into what's happening inside. Now I'm wondering what other devices implemented this sort of discrete design.

The vector generator I mentioned is fascinating in that it's essentially a simple coprocessor that reads instructions out of a RAM and then draws the vectors on the monitor without intervention from the 6502 CPU. The CPU loads the object(s) to be drawn into the vector RAM and then the vector generator takes care of the heavy lifting and lets the CPU know when it's finished. This enabled extremely primitive (by modern standards) hardware to generate some really impressive high resolution graphics with glassy smooth framerates. I don't want to take this completely off topic but for anyone interested there is an excellent writeup by one of the original designers here: https://www.jmargolin.com/vgens/vgens.htm

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I'm wayyy off topic here, but if you like my waffle...

These days (since early 1990s) we do the logic design with specialised software languages like SystemVerilog or VHDL, generally known as Hardware Description Languages or HDLs. This description can't be "anything and everything" you like in these languages, you have to use particular constructs in particular contexts to "infer" meaningful structures like combinational logic or flip-flops (an abstraction we call Register Transfer Level, or RTL). Then we use a process called logic synthesis which converts the HDL description into a logic netlist (AND, OR, NAND, NOR gates, flip-flops etc). This logical netlist then has to be "layed out" onto silicon by taking the transistors of each gate and mapping them onto silicon and defining the layers that are needed in the silicon (wells, channels, contacts), then these transistors have to be wired together by creating metal interconnects that join silicon contact to silicon contact in the required circuit topology. We also have to add power meshes and clock distribution networks and fix the timing of the circuit (setup and hold). Once the physical design is complete and the layout meets all of the logical and physical design rules, the design can be sent to the silicon foundry at a point we call "tape out". The foundry do the magic chemistry steps to actually fabricate our design onto a silicon wafer. Then there is test and packaging assembly and a whole load of qualification testing to be done before the device can be released as a production part. This is a design cycle that is typically between 1 and 3 years depending on the complexity and size of the design. That's an extremely brief and simplified overview, but I'm sure you could google for more detail!

Back to FSMs we wouldn't usually (ever?) use a ROM style implementation on a custom chip, we'd use an HDL to infer "random logic" to build the next-state logic. The ROM method used in the project you are looking at is a clever way to implement "random logic" in one off-the-shelf chip - couple it with a bank of flip-flops (like IC9) and you have yourself the building blocks for your FSM. The clever bit now is to work out the ROM contents which is how you define the logic of your FSM and hence its function/behaviour. There are a couple of flavours of FSM, Moore and Mealy. These terms describe how the state and outputs are a function of the inputs (Moore -> outputs are only a function of the current state, Mealy -> outputs are a function of the current state and the current inputs). Your copy-bit killer is probably a Mealy machine (the output SPDIF flop stage is not part of your FSM state because it doesn't feed back into the EPROM).

Anyway that's enough from me for one night!

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On 3/30/2020 at 1:06 AM, sfbp said:

With respect, we know so many simple ways to get around SCMS, this project is kinda moot.

1. Buy a pro model (for around $200?) such as the MDS-E10
2. Get a device like the Behringer Ultramatch Pro...

Have the E10, but would like to know if the Behringer and its close kin preserve track marks.

Also, my HHB-BurnIT (standalone CD-R) kills SCMS; between it and the E10 I'm well-covered...but I am hoping to outlive both units, so just looking ahead in a hopeful way.

 

 

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  • 1 month later...

Sorry, I missed your question.

I think the answer is a resounding NO, because what is required is for the transmitter to actually DROP the line. It is my impression that the PCLK does.

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6 hours ago, sfbp said:

Sorry, I missed your question.

I think the answer is a resounding NO, because what is required is for the transmitter to actually DROP the line. It is my impression that the PCLK does.

Thanks. Here's a way I have foiled SCMS. Elegant it is not. I do have some CD-Rs that have SCMS because of how I copied them. Rip the CD-R. [Insert mp3 silent track of a few seconds between the ripped tracks.] Copy via opt. out to MD. I guess when you rip the CD-R, SCMS goes away? Anyway, the silent tracks almost always do the trick for track marking, when SmartSpace is enabled. Too well do I recall the bad old days when SCMS was a real monster for MD users.

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10 hours ago, sfbp said:

I think the answer is a resounding NO, because what is required is for the transmitter to actually DROP the line. It is my impression that the PCLK does.

I'm a little lost - are we talking here about external kit (like Behringer SRC2496) preserving track marks, or about killing the SCMS bit?

Thanks!

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To make a track mark, you either have to have something which drops the line completely, or something which causes the signal to go below a certain level AND a MD recording device which is set to make a track mark when that happens.

I think the PCLK-MN20 fakes out the complete line drop.

Time to do some experiments, Kevin. I've spent so many hours on this issue fiddling about that I've forgotten the issues. Your analytical mind can probably resolve this better than any of us.

Bruce's comment about SCMS was about the fact that using the Behringer to defeat SCMS leaves you with a signal that doesn't go low enough to trigger track marking. Right?

(this is what routinely happens when I answer one of these exchanges when I'm up in the wee hours - I start babbling. More in daylight hours!)

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Other than threshold crossing detection to insert track breaks when doing recording from analogue, I've no idea how track marking works. I assumed over SPDIF there would be information in the frame that provided either some kind of sequence number (change in sequence number = new track) or an explicit track marker packet. Looks like I need to do some material research and reading up!

Yes, Stephen, I do see you replying at what must be unearthly hours in your neck of the woods, I hope you are looking after yourself!

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14 hours ago, sfbp said:

Bruce's comment about SCMS was about the fact that using the Behringer to defeat SCMS leaves you with a signal that doesn't go low enough to trigger track marking. Right?

(this is what routinely happens when I answer one of these exchanges when I'm up in the wee hours - I start babbling. More in daylight hours!)

Right. In fact, I had an instance where, when streaming audio, if I reduced the volume by about  a third, I did get most track marks. But I indeed was asking about the Behringer.

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  • 2 months later...

Random, sorry, but I just dug up the Behringer manual page on SCMS for the SRC2496 so thought I’d capture the section here for reference (yes I know you can download the pdf from the Behri website). This also shows all 4 combinations of the two binary digits.

AE6EC6AB-6B54-470A-9CAD-7220C67F4E03.jpeg

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8 minutes ago, sfbp said:

I bought mine new and never (well, hardly ever) looked at the manual...

Bought mine new too and it’s never been out of the box since a couple of weeks later I did your option 1). I think it was my E12 but same result!

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  • 1 month later...
  • 4 months later...

 

Coincidentally I've just retrieved my Elektor SCMS "copybit killer" from storage and had a play with it :) The pots to light the correct sample-rate LEDs needed a tweak but it still works fine. I'd also retrieved some of my "old" HiFi gear from storage too, including the MDS-JB930 minidisc deck! And my old Technics RS-B665 tape deck which I've since built a wireless remote control for, but that's another story :-)

I bought the Elektor kit in Jan 2000 (I faxed the order over to Germany, how quaint :-D ) and used it a lot at the time for MD-MD copies. According to the invoice it cost me £48.38

I've imaged the ROM (and already discussed at length with the OP over on another forum!) initially using a Raspberry Pi (without level shifting) but I was worried about data integrity as the 27C512 is an old 5V part and the Pi GPIO is all 3V3 and not 5V tolerant. So I splashed out on a TL866 USB programmer and double checked. The original image good was after all. Reading the old 5V part at 3V3 at slow speed (1ms between reads) worked for me.

Fascinating insight into the design of the SCMS stripper - in my career the last time I came across a (very badly designed) ROM state machine was in some Telecom kit (actually deep inside a System X telephone exchange in 1994 8-) )

 

 

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