kgallen

Assume you mean "only Sony decks..."? Some manufacturers designed their own MD chipsets to Sony specifications for ATRAC and maybe Sony didn't release the later ATRAC specs and sold/licensed the chipset instead. My Tascam's seem to have Tascam-designed drives (as in they are not Sony MDM series drives), but they use the Sony CXA/CXD chipset. Probably the mechanicals are Tascam but the drive schematics are just licensed from Sony.

Triggered by this discussion amongst others related, I was trying to piece together the pre-HiMD timeline of ATRAC and what I might have in my own Sony and Tascam machines. Probably well understood already by those deep into the format, but I thought I'd drop a few notes here as it seems an appropriate thread. I'm talking about decks here, but Sony is likely to have aligned the technology within their mobile products within 6 months or so if not sooner. ATRAC1 v4.5 started with the MDM-5A drive (CXD2654 DSP), so with machines like my MDS-JE520 (1998 timeframe in the UK) Type R was added to ATRAC1 v4.5 with the MDM-5D drive (CXD2656 DSP), so with my newly working MDS-JE530. In this example, the deck boasts "ATRAC DSP Type-R" on the front panel, but this is probably not universal. What this means is, even though your machine is not MDLP, it might be Type R. At this point there is a CXD2660 DSP, which is used in the MZ-B50, but I don't have any more details on the ATRAC used. Possibly the same as the previous CXD2656? ATRAC3 came in with MDM-7A drive (CXD2662 DSP), so MDS-JE440/640/JB940. This is also Type R, but with MDLP added. The machine will say it's MDLP, so if it does, then you know it's also Type R. This was useful to know for my Tascam MD-350 and MD-CD1 Mk1's, since they are MDLP but don't mention Type R so it's good to know they are Type R (for SP recording/dubbing, Type R does not get used for high-speed dubbing from CD. They use CXD2662 DSP.). The Sony "Pro" decks MDS-E10 and MDS-E12 are MDM-7SC drive but use the CXD2662 DSP (Note: MDS-E11 is 1998 vintage so probably ATRAC1 v4.5 like the MDS-JE520). Type S came in with the MDM-7S1A series drives (CXD2664 DSP), so like MDS-JE480/780/JB980. Hope that helps anyone! Kevin

I'm wayyy off topic here, but if you like my waffle... These days (since early 1990s) we do the logic design with specialised software languages like SystemVerilog or VHDL, generally known as Hardware Description Languages or HDLs. This description can't be "anything and everything" you like in these languages, you have to use particular constructs in particular contexts to "infer" meaningful structures like combinational logic or flip-flops (an abstraction we call Register Transfer Level, or RTL). Then we use a process called logic synthesis which converts the HDL description into a logic netlist (AND, OR, NAND, NOR gates, flip-flops etc). This logical netlist then has to be "layed out" onto silicon by taking the transistors of each gate and mapping them onto silicon and defining the layers that are needed in the silicon (wells, channels, contacts), then these transistors have to be wired together by creating metal interconnects that join silicon contact to silicon contact in the required circuit topology. We also have to add power meshes and clock distribution networks and fix the timing of the circuit (setup and hold). Once the physical design is complete and the layout meets all of the logical and physical design rules, the design can be sent to the silicon foundry at a point we call "tape out". The foundry do the magic chemistry steps to actually fabricate our design onto a silicon wafer. Then there is test and packaging assembly and a whole load of qualification testing to be done before the device can be released as a production part. This is a design cycle that is typically between 1 and 3 years depending on the complexity and size of the design. That's an extremely brief and simplified overview, but I'm sure you could google for more detail! Back to FSMs we wouldn't usually (ever?) use a ROM style implementation on a custom chip, we'd use an HDL to infer "random logic" to build the next-state logic. The ROM method used in the project you are looking at is a clever way to implement "random logic" in one off-the-shelf chip - couple it with a bank of flip-flops (like IC9) and you have yourself the building blocks for your FSM. The clever bit now is to work out the ROM contents which is how you define the logic of your FSM and hence its function/behaviour. There are a couple of flavours of FSM, Moore and Mealy. These terms describe how the state and outputs are a function of the inputs (Moore -> outputs are only a function of the current state, Mealy -> outputs are a function of the current state and the current inputs). Your copy-bit killer is probably a Mealy machine (the output SPDIF flop stage is not part of your FSM state because it doesn't feed back into the EPROM). Anyway that's enough from me for one night!

Nope, sorry. I'm a (digital) IC designer by day (and night more often than I'd like!). Hardware FSMs are our bread and butter! We love our software boys dearly, but there is a damn lot of complex hardware behind that software (if there is any software involved at all) and the bulk of it is based around implicit or explicit FSMs! There are ~6 billion transistors in the last chip I worked on and a similar number in the current one [that I'm supposed to be working on now, not typing this!]. OK there is a lot of memory in that, but there are also many millions of flip-flops that are part of FSMs, counters, FIFOs and other control type structures. From a conversation with a non-techie I had a few years ago (maybe at a wedding or something like that): "Oh, you're a silicon chip designer? I thought we dug them up." - yep, they come straight out of the silicon chip mine and they know from birth they're a mobile phone modem/microwave oven controller/TV display controller/toothbrush driver... <add an almost unimaginable number of other electrical devices> Thinking more widely about the various jobs that people have across the world to create products, provide services and the like, I can imaging the "man on the street" would be totally amazed at the type of jobs there are out there that they wouldn't envisage in daily life, but enable that life. It's easy to comprehend a builder or a shop worker or an accountant, but there are so many "behind the scenes" jobs that enable modern life that most of the general public are just oblivious to! Anyway I digress... Hope you give it a bash even if you don't manage to work out the entire FSM!!! :-D

Hi James, No problem - I'd understood that you wanted this as a learning/academic exercise - earlier in the thread we've already discussed the more practical solutions to the problem with ready-made products. Regards the Pascal program, this is something you could code in C or Perl or Python or Tcl, or even Verilog/SystemVerilog or VHDL if that is what you used for your FPGA design work. All it's doing is taking the grind out of converting your FSM next-state logic design into a file to feed your EPROM programmer (Hex, Intel or S-Record file). I'm not trying to suggest this is trivial by any means, but it is certainly a tractable and interesting/valuable exercise in FSM design with ROM. Most of the ROM will contain very boring numbers. For example, most of the time, the circuit should just copy the SPDIF input to the SPDIF output. It's only that Copy bit that we're trying to intercept and change to a '1'. What this means, is for most states, the EPROM D0 output (which is the SPDIF output) is the same value as input A0 (the "oldest" bit in the SPDIF input shift register). What this means, is that for many addresses, A[15:1]=X, A[0]=0 the ROM location contains 0x00 (i.e D0=0) and for A[15:1]=X, A[1]=1 the ROM location contains 0x01 (i.e D0=1). That is your "background fill" for the ROM. However some of these addresses need overwriting with your FSM design and as previously discussed, this needs to watch the SPDIF input bits arrive at the shift register parallel output (on A[7:0]), look for the framing signal, then step through subsequent bits until the Copy bit is aligned with A[0] and then, instead of outputting "A[0]" on D0, it outputs a '1' (i.e. you will have a memory location with A[0]=0 that has D0=1 rather than the D0=0 we would have had from our "background fill"). Regards FSMs in real life. Any non trivial digital logic is jam-packed with FSMs. They are so fundamental they are ubiquitous. Even a simple digital counter is an FSM. It has states 0,1,2,3,4,...,(n-1),0,... So your clock radio, microwave oven, TV, MD/CD/DVD/video machines, phone, computer, car, DAB radio, calculator, digital watch, FitBit, Xmas tree lights etc etc etc!!! Good luck and enjoy! Kevin

As I understand from other posts on this forum, ATRAC-S makes LP4 music listenable. I think LP2 is pretty good anyway but ATRAC-S should make it closer to SP. The only LP4 recording I have is an audio book (or two). You can tell it's not perfect but LP4 is perfectly fine for such material. However I did dub it from Type 1 compact cassette so the audio trail was not exactly perfect!

This page help at all? http://minidisc.org/part_Sony_MZ-M200+RH1.html As a "new re-convert", minidisc.org is a very useful resource and we refer to it often!

You could be right I guess. The 520 deck has a fluorescent display. Your RH1 display looks a bit 'fluorescent' (cold white) but you're right, it's OLED, so I'm probably off the mark. I'm no expert on displays. Still would be surprised Sony's displays were that bad though - a quick google suggests Sony had OLED TVs in 2007 so the technology should have been pretty mature by then, and the display on the RH1 is tiny compared to a TV.

ATRAC-S only benefits playback of MDLP (LP2, LP4). ATRAC-S does not affect recording. ATRAC-R benefits the recording of SP tracks and creates a track encoding that is beneficial for playback on any SP device, even those machines without the ATRAC-R DSP. So if you have a lot of LP2 and LP4 MDLP recordings you listen to, then ATRAC-S should be of benefit. If the machine has ATRAC-S then it definitely has ATRAC-R. Kevin

Yep any reliable power - I assume battery won't last long that's all. I could be way off the mark with this idea on this machine. But I'm sceptical that such a new machine would have a bad display. Sony wouldn't use such a poor performing component in their products. I've learnt on this forum that often the problem is a simple one. Replacing displays and lasers are not simple solutions! Let us know if you make any progress.

If you can keep it powered (mains adaptor) can you keep it ‘lit’ for a while to see if that helps rejuvenate it? Almost certainly a different type of display, but when I got my MDS-JE520 out of retirement a couple of years back the display was very patchy. It’s had a lot of use since then and the display is near perfect now just through being on and used. Could be a red-herring but worth a try?

[ETA] Sorry James, I realise you already bagged the EPROM as part of an FSM. I wrote the below on my phone first thing having not read the entire thread above! The EPROM does not contain machine code for a microprocessor. It’s used as a neat way to implement a finite state machine (standard digital electronics building block). It’s job is to match a sequence of bits in the SPDIF [***] preamble in order to identify the SCMS control bits which the rest of the circuit then override and reconstruct the SPDIF stream. Maybe there is some circuit description in the magazine article [*] that describes this and thus you could work out the EPROM contents. Do some investigation then come back here with some details and I can probably help you decipher what you need. Kevin [*] I’ve got a feeling I have a scan of that article [**]. The EPROM implements the ‘next state’ logic and IC9 holds the ‘current state’. All the crazy stuff at the top of the schematic is about clock recovery! Just look at IC7,8,9. IC7 is a shift register clocking in the SPDIF data stream. The first job for our IC8,9 FSM is ‘frame alignment’ as bits arrive in IC7 and get presented to the EPROM. ‘Bits’ (pins) 18 through 12 on IC9 are your ‘current state’. [**] A had a Google too. It seems Elektor did at least 3 articles on SCMS circuits. I can't get to any of these, even after registering on the Elektor site, as you need a paid membership to access these articles. The article I do have a copy of is for a different SCMS copy-bit killer circuit, again from Elektor, but from June 2002. As with the circuit you refer to, it uses an EPROM as a nifty way to perform the next-state logic, but this logic is specific to their circuit design, so even if I had the ROM contents they wouldn't be correct for your particular Elektor project. [***] There is some framing/protocol information on epanorama or HwB or scanlime. As I'm sure you've already worked out, the circuit aims to make bit 2 of the ChannelStatus a logic '1' (copy allowed).

The ‘thing above the laser’ is that the overwrite head? Can’t see how that would affect playback - play only units don’t even have a OWH! Regardless, a brilliant outcome! Well done!

In which case we're already quids-in for the UM and SM: https://www.minidisc.org/part_Sharp_MD-MT50+SR50+SR60+SR70+SR75.html Good call!

If you haven't already got it, the SM is here: https://www.minidisc.org/manuals/sony/service/MDS-JA3ES.pdf p26 $4-6 details LDPWR adjust. One or two clicks up of the tenths. Remember where you started. DONT look into the machine.

Just to clarify "play": this means reads the TOC and can play the music. Do you have scenarios where it will read the TOC but not play music? Can you title a disc (disc or track) reliably - as in write it, eject the disc then reinsert and the machine can read the TOC and title?

Have you got/are you using a laser power meter? Asking in the nicest possible way, do you know why and how much you're changing the laser power or are you just fiddling? Increasing the laser power arbitrarily is unlikely to improve the situation and it's very easy to burn it out by increasing the current too far. Will it play other known good discs? Taking a sacrificial good disc, does the disc appear to get blanked by trying to record on it? This would imply overwrite head not laser.

Yes they do. It's not gold flashed, more like smooth tinned. Search "FFC cable" for a picture.

It's a "pen" with a low abrasive tip commonly used to clean electrical contacts. https://www.amazon.co.uk/Fibreglass-Abrasive-Cleaning-Pencil-Refills/dp/B003YSWJDG

Unplug. Open up. Remove and reinsert all ribbon cables both ends. That seems to be the recipe that's saving all our machines recently!

Sony MD machines use a 1.0mm pitch FFC cable between the main PCB and the MDM. eBay seller (UK) (As of Mar/2020 they are around 2GBP per 2 pieces from China) ETA (Oct/2020): Above link is broken. Seller in UK is hkdz-2017: http://www.ebay.co.uk/usr/hkdz-2017?_trksid=p2057872.m2749.l2754 This is his shop, searched for FFC 1.0mm: https://www.ebay.co.uk/str/hkdz2017?_bkw=ffc+1.0mm If the size you want isn't listed, ask him - some of the sizes I wanted I couldn't find. I asked him and he pointed me to another link. Cables listed below may be the same for machines higher in the same range (e.g. 440,640,940). Check the Service Manual for the same Sony part number in each. MDS-JE480 (MDM7S1A) 23P, W=24mm, L=80mm, Forward 27P, W=28mm, L=200mm, Forward Front panel: 15P, W=16mm, L=150mm, Forward MDS-JE440 (MDM7A) 23P, W=24mm, L=80mm, Forward 27P, W=28mm, L=80mm, Forward Front panel: 15P, W=16mm, L=290mm, Forward (use 300mm) MDS-E10, MDS-E12 (MDM7SC) 23P, W=24mm, L=195mm, Forward 27P, W=28mm, L=165mm, Forward (Above are non-standard sizes, choose 200mm product and fold accordingly.) Front panel: 23P, W=24mm, L=80mm, Forward More as I find them. Kevin

Per, Not at all! It's been an interesting journey and I've learnt some stuff about our machines! An interesting thread none the less! Kevin

Rather you than me. Having the calibration kit like IOP board and LPM is a must. Plus a decent anti-static workstation setup. I'm not so convinced the lasers are at fault as much as appears. Drive swap would always be my port of call unless I was really desperate - say one of my MDM7SC drives went down and I was certain (how?) it was the laser (although I know a MDM7S1A works and I can do without the serial control). Replacement lasers are costly if they can be found. A donor machine costs in easily if you can find the right type and of course a much easier swap!

I love it when someone with a little care gets a great machine working again. So much "WEEE" shouldn't be such. Even better when it was a bargain! Good point about an MDLP disc in an SP machine too! My 530 is still working! :-D

I think crippling an own technology and product like that would be more cynical than ever I could achieve! I’ve got lots of decks and I think they all output at the 0dB setting. Whilst I’m no maestro I think I’ve got quite ‘hi-if’ ears so any horrible sound I’d quite quickly pick up on. The nature of saturation of any digital signal means that if you saturate the coding you will get an instant and hard clip. Not a soft mushy clip you’d get with a pure analogue device. That’s why with a digital mixer you’d mix to around -18dBFS to give 18dB peaking headroom. With analogue mixing you mix to around 0dB assuming your audio chain had a peak handling of at least +20dB. In respect of this setting on the MD players, 0dB means ‘unity gain’. Decibel is a relative measure not a physical (measurable) unit. It means nothing on its own, you have to use it with some real world unit. Decibel against a unit, eg dBm or dBV is an absolute unit and means something ‘on its own’. Consumer line level is considered -10dBV. In your opening statement, is that -6dB actually -6dBV, which if so is possibly over-driving the input. -10dBV is 0.316V: -10dBV = 20 log(base10) (0.316/1) [or as I worked out "V". V = 10^(-10/20)*1 = 0.316] The 980 has a "rated input" of 500mV (into 47k). That translates into -6dBV. However with unity gain on the input stage analogue setting that's probably going to exceed 0dB in the digital domain, which means clipping. i.e. is your original hypothesis sensible if we're talking the same units? I'm learning/revising too so I'm not trying to be dismissive with the above, I hope it doesn't come across like that, it's not intended to! https://www.sweetwater.com/insync/understanding-signal-levels-audio-gear/